1. Field of the Invention
Generally, the present disclosure relates to the fabrication of sophisticated integrated circuits including advanced transistor elements that comprise complex gate electrode structures including a sophisticated gate dielectric, such as a high-k gate dielectric, and a metal-containing electrode material.
2. Description of the Related Art
The fabrication of advanced integrated circuits, such as CPUs, storage devices, ASICs (application specific integrated circuits) and the like, requires the formation of a large number of circuit elements on a given chip area according to a specified circuit layout. In a wide variety of electronic circuits, field effect transistors represent one important type of circuit element that substantially determines performance of the integrated circuits. Generally, a plurality of process technologies are currently practiced for forming field effect transistors, wherein, for many types of complex circuitry, MOS technology is currently one of the most promising approaches due to the superior characteristics in view of operating speed and/or power consumption and/or cost efficiency. During the fabrication of complex integrated circuits using, for instance, MOS technology, millions of transistors, e.g., N-channel transistors and/or P-channel transistors, are formed on a substrate including a crystalline semiconductor layer. A field effect transistor, irrespective of whether an N-channel transistor or a P-channel transistor is considered, typically comprises so-called PN junctions that are formed by an interface of highly doped regions, referred to as drain and source regions, with a slightly doped or non-doped region, such as a channel region, disposed between the highly doped regions. In a field effect transistor, the conductivity of the channel region, i.e., the drive current capability of the conductive channel, is controlled by a gate electrode formed adjacent to the channel region and separated therefrom by a thin insulating layer. The conductivity of the channel region, upon formation of a conductive channel due to the application of an appropriate control voltage to the gate electrode, depends on the dopant concentration, the mobility of the charge carriers and, for a given extension of the channel region in the transistor width direction, on the distance between the source and drain regions, which is also referred to as channel length. Hence, in combination with the capability of rapidly creating a conductive channel below the insulating layer upon application of the control voltage to the gate electrode, the conductivity of the channel region substantially affects the performance of MOS transistors. Thus, as the speed of creating the channel, which depends on the conductivity of the gate electrode, and the channel resistivity substantially determine the transistor characteristics, the scaling of the channel length, and associated therewith the reduction of channel resistivity, which in turn causes an increase of gate resistivity due to the reduced dimensions, is a dominant design criterion for accomplishing an increase in the operating speed of the integrated circuits.
Presently, the vast majority of integrated circuits are based on silicon, due to its substantially unlimited availability, the well-understood characteristics of silicon and related materials and processes and the experience gathered during the last 50 years. Therefore, silicon will likely remain the material of choice for future circuit generations produced by volume production techniques. One reason for the dominant role of silicon in fabricating semiconductor devices has been the superior characteristics of a silicon/silicon dioxide interface that allows reliable electrical insulation of different regions from each other. The silicon/silicon dioxide interface is stable at high temperatures and, thus, allows the performance of subsequent high temperature processes, as are required, for example, during anneal cycles to activate dopants and to cure crystal damage, without sacrificing the electrical characteristics of the interface.
For the reasons pointed out above, in field effect transistors, silicon dioxide is preferably used as a base material for a gate insulation layer that separates the gate electrode, frequently comprised of polysilicon and metal-containing materials, from the silicon channel region. In steadily improving device performance of field effect transistors, the length of the channel region has continuously been decreased to improve switching speed and drive current capability. Since the transistor performance is controlled by the voltage supplied to the gate electrode to invert the surface of the channel region to a sufficiently high charge density for providing the desired drive current for a given supply voltage, a certain degree of capacitive coupling, provided by the capacitor formed by the gate electrode, the channel region and the silicon dioxide disposed therebetween, has to be maintained. It turns out that decreasing the channel length requires an increased capacitive coupling to avoid the so-called short channel behavior during transistor operation. The short channel behavior may lead to an increased leakage current and to a very pronounced dependence of the threshold voltage on the channel length. Aggressively scaled transistor devices with a relatively low supply voltage and thus reduced threshold voltage may suffer from an exponential increase of the leakage current while also requiring enhanced capacitive coupling of the gate electrode to the channel region. Thus, the thickness of the silicon dioxide layer has to be correspondingly decreased to provide the required high capacitance between the gate and the channel region. For example, a channel length of approximately 80 nm may require a gate dielectric made of silicon dioxide as thin as approximately 1.2 nm. Although the usage of high speed transistor elements having an extremely short channel may be restricted to high speed signal paths, whereas transistor elements with a longer channel may be used for less critical circuit portions, such as storage transistor elements, the relatively high leakage current caused by direct tunneling of charge carriers through an ultra-thin silicon dioxide gate insulation layer may reach values for an oxide thickness in the range or 1-2 nm that may not be compatible with requirements for performance driven circuits, even if only transistors in speed critical paths are formed on the basis of an extremely thin gate oxide.
Therefore, various measures have been proposed for increasing the dielectric strength and the effective dielectric constant of the silicon dioxide material, such as performing treatments on the basis of nitrogen in order in incorporate a certain amount of nitrogen. Although these treatments of the base oxide material provide significant improvements, the further scaling of the transistor dimensions may demand even further sophisticated approaches. To this end, replacing silicon dioxide as the material for gate insulation layers has been considered, particularly for extremely thin silicon dioxide based gate layers. Possible alternative materials include materials that exhibit a significantly higher permittivity so that a physically greater thickness of a correspondingly formed gate insulation layer provides a capacitive coupling that would be obtained by an extremely thin silicon dioxide based layer. It has thus been suggested to replace at least a portion of the conventional silicon dioxide with high permittivity materials such as tantalum oxide (Ta2O5), with a k of approximately 25, strontium titanium oxide (SrTiO3), having a k of approximately 150, hafnium oxide (HfO2), HfSiO, zirconium oxide (ZrO2) and the like.
Additionally, transistor performance may be increased by providing an appropriate conductive material for the gate electrode to replace the usually used polysilicon material, since polysilicon may suffer from charge carrier depletion at the vicinity of the interface to the gate dielectric, thereby reducing the effective capacitance between the channel region and the gate electrode. Thus, a gate stack has been suggested in which a high-k dielectric material provides an increased capacitance based on the same or greater thickness as a silicon dioxide based layer, while additionally maintaining leakage currents at an acceptable level. On the other hand, the non-polysilicon material, such as titanium nitride and the like, may be formed so as to connect to the high-k dielectric material, thereby substantially avoiding the presence of a depletion zone.
After forming sophisticated gate structures including a high-k dielectric material, however, high temperature treatments and other processes are required which may significantly affect the high-k material.
For this reason, many high-k dielectric materials may be subjected to a postdeposition treatment in order to achieve superior stability of the material characteristics during the further processing. For example, an encapsulation of the high-k dielectric material may typically be necessary in order to reduce the interaction with metal-containing electrode materials and other process environments encountered during the further processing of the device. Furthermore, the crystallization temperature of the high-k dielectric material may have to be increased to provide superior stability during subsequent high temperature processes that may typically be required for completing the basic transistor configuration. Other material modifications may involve a phase separation of the high-k dielectric materials and also diffusion of implantation species, which may be incorporated into an upper portion of the gate electrode structures during the further processing, may have to be blocked. Moreover, a shift of the work function and a reduction of the permittivity of the high-k dielectric material, which may be associated with an increase of layer thickness, may result in a significant threshold voltage variation of the transistor, which is believed to be caused by a substantial interaction of the gate stack materials with oxygen. For example, hafnium oxide and zirconium oxide may exhibit a very high oxidation rate in the presence of oxygen and elevated temperatures, thereby resulting in a pronounced modification of the material characteristics which may thus lead to a significant variability of transistor characteristics. Consequently, it may be very difficult to accurately adjust the threshold voltage of transistors on the basis of a high-k dielectric material that is provided in an early manufacturing stage. In some conventional approaches, a certain degree of stabilization of material characteristics may be accomplished by a treatment of the high-k dielectric material immediately after deposition, for instance in the form of nitridation and the like, in order to enhance the further processing of the sensitive gate dielectric materials. On the other hand, the threshold voltage of the transistors may have to be specifically adjusted on the basis of a specific work function metal in combination with the high-k dielectric material. In some conventional approaches, the threshold voltage adjustment may be accomplished by incorporating a certain metal species into the high-k dielectric material in order to obtain a desired work function in combination with a metal-containing material formed on the high-k dielectric layer. One efficient technique for incorporating the desired metal species into the high-k dielectric material is the provision of a cap layer including the desired diffusion species and performing a heat treatment to initiate the diffusion of the metal species into the high-k dielectric material. The incorporation of the desired metal species for N-channel transistors and P-channel transistors may typically be performed at any appropriate manufacturing stage, for instance, in a very late stage after completing the basic transistor configuration or in an early manufacturing stage, i.e., after providing the stabilized high-k dielectric material and forming a cap layer thereon, which may contain the desired metal species for the transistor under consideration. Due to the superior stability of the high-k dielectric material, however, moderately high process temperatures and concentrations of the desired metal species are required, which may negatively influence transistor characteristics, thereby reducing the finally achieved overall performance of the transistors.
The present disclosure is directed to various methods and devices that may avoid, or at least reduce, the effects of one or more of the problems identified above.